Cypress Semiconductor /psoc63 /I2S0 /TX_FIFO_CTL

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Interpret as TX_FIFO_CTL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TRIGGER_LEVEL0 (CLEAR)CLEAR 0 (FREEZE)FREEZE

Description

TX FIFO control

Fields

TRIGGER_LEVEL

Trigger level. When the TX FIFO has less entries than the number of this field, a transmitter trigger event is generated.

CLEAR

When ‘1’, the TX FIFO and TX_BUF are cleared/invalidated. Invalidation will last for as long as this field is ‘1’. If a quick clear/invalidation is required, the field should be set to ‘1’ and be followed by a set to ‘0’. If a clear/invalidation is required for an extended time period, the field should be set to ‘1’ during the complete time period.

FREEZE

When ‘1’, hardware reads from the TX FIFO do not remove FIFO entries. Freeze will not advance the TX FIFO read pointer. This field is used only for debugging purposes.

Links

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